Through the 90s the Zilog Z80 was my favorite CPU to work with. I loved the architecture, instruction set, capabilities and vast array of support chips available. I started designing commercial Z80 boards around 1992 and the early designs were built on perf-board and wire-wrapped. This article discusses a couple of early boards I made, the design, the development tools I used and even some example code.
Mark I Prototype
Based on the number of integrated circuits used in the first version, it was decided that the most efficient assembly method was going to be wire-wrapping. The original prototype had 10 integrated circuits:
- (1) Z80 CPU
- (1) 27C256 32K EPROM
- (1) 62256 32K SRAM
- (1) 8255 PPI
- (1) 74LS138 1-of-8 Decoder
- (1) 74LS244 Octal Buffer
- (1) 74LS374 Octal D-Type Latch
- (1) 72LS02 Quad NOR Gate
- (1) 74LS14 Schmitt Trigger Inverter
- (1) 1 MHz TTL Oscillator
The Z80 CPU was connected to the 27C256 32K EEPROM from address $0000-7FFF and the 62256 32K SRAM was connected from address $8000-$FFFF giving 64K of memory address space. A15 of the Z80 was used to select between the EPROM and SRAM in conjunction with the correct control bus lines (/MEMREQ, /RD, /WR, etc).
The Z80 CPU was connected to the 8255 PPI, 74LS244, 74LS374 and 74LS02 via the 74LS138. The 8255 was used to various experimental I/O, while the 74LS244 and 74LS374 were used as an 8×8 matrix keyboard decoder, specifically designed for use with Commodore C=16 / C=64 keyboards. Finally, the 74LS02 was used along with control lines from the Z80 and the decoded output of the 74LS138 to create an interface to a HD44780 Parallel LCD. Two (2) gates were used from the NOR gate to provide the high ENABLE line on the 40×2 LCD, which was wire-wrapped directly to the pins on the board.
The 74LS14 was used to condition several inputs to the Z80, including the reset signal from a capacitor / resistor, the noise-buffered manual reset input and the optically-isolated AC signal from the power input being fed to the NMI line for timekeeping. The 1 MHz TTL Oscillator directly fed the CLK input on the Z80.
Mark II Prototype
The second version of the prototype was also wire-wrapped, however, as you can see in the photo, a SIP header was added to the edge for the keyboard interface, which was pin-compatible with the C=64 keyboard connector.
The two 14-pin DIP headers were for dual Hitachi Parallel LCDs or a single 4-line display. All four (4) NOR gates on the 74LS02 were used to decode two (2) ENABLE outputs. Decoupling capacitors were also added to all integrated circuits and an extra IC was added to facilitate a very simple sound interface.
Programming the Z80 Control Board
The resources for programming these Z80 Control Boards consisted of the following hardware and software:
- DOS-based PC
- TASM 3.2 (Table-Driven Assembler)
- Needham’s PB-10 Device Programmer (ISA Card, Used on Mark I Prototype)
- Needham’s EMP-20 Device Programmer (LPT Port, Used on Mark II Prototype)
- Needham’s Device Programmer Software (DOS)
- Datarase II EPROM Eraser
TASM 3.2 was able to compile code for the Z80 as well as 10 other platforms, including the 6502 and 6800. The source code was written using a standard text editor. The resulting source was run through the compiler and the binary output was loaded into the Device Programmer software. A DOS batch file was written to automate this process, including selecting the correct switches for the assembler and the device programmer software. When an update was needed, the EPROM was erased and reprogrammed. A little tedious, but it was how things were done. I usually kept about 8 EPROMs on hand to make swapping easier. The eraser held 4 chips, so I would rotate them in groups of 4.
By the time I created the Mark II Prototype I had also upgraded to a Needham’s EMP-20 Device Programmer which connected to the PC printer port. You can download TASM V3.2 below. Original test source code will be posted if recovered.
THIS IS A RESTORED ARCHIVE PROJECT AND AS SUCH MAY BE MISSING PHOTOS, PARTS LIST, SCHEMATIC, SOURCE CODE, ETC.